As is well known, communication between digital circuits is often facilitated by a digital data bus consisting of a plurality of individual bit lines. Digital circuits utilizing a data bus generally communicate therewith by way of a plurality of line transceivers, with each transceiver being connected to a separate bit line through a bonding pad. Each line transceiver typically includes a receiver for conveying information from the bit line to a host circuit (e.g., a microprocessor) and a driver for impressing signals generated by the host circuit upon the bonding pad.
Conventional line receivers essentially operate as logic gates having well-defined input thresholds. A logical low is recognized in response to signals from the bit line less than the input threshold, while the line receiver recognizes a logical high upon receipt of signals from the bit line larger than the input threshold. The input threshold is typically controlled by a differential comparator having a first input connected to the bonding pad, and a second input connected to a reference voltage equivalent in magnitude to the threshold voltage.
Unfortunately, a number of difficulties are associated with such conventional differential input stages. For example, the process of converting a two-element differential input to provide a single logic level tends to degrade bandwidth. In addition, since a differential comparator is a linear circuit, a portion of the current which would otherwise be available for logic level switching is used to bias the differential stage. Moreover, larger devices are needed to increase switching speed since the time required by a differential comparator to switch between logic states is proportional to a quiescent bias current. This mode of increasing switching speed is limited, however, due to the increased parasitic capacitance associated with comparators incorporating such larger devices.
A standard two-transistor CMOS inverter provides an alternative which overcomes certain of the drawbacks associated with differential input stages. For example, the single-input design of a CMOS inverter does not engender a loss in bandwidth. In addition, since CMOS inverters do not require a quiescent bias current switching speed may be enhanced without causing an increase in parasitic capacitance. However, the input threshold voltage of the CMOS inverter is influenced by changes in parameters such as processing, temperature and power supply. Accordingly, it would be advantageous to provide a CMOS line receiver having a switching threshold substantially invariant to the parameter variation that tends to adversely affect conventional inverters.
Standard line drivers generally include a bipolar transistor having a collector terminal coupled to the bonding pad through a Schottky diode, with the bonding pad being coupled to a supply voltage through an external termination resistor. The Schottky diode increases the size of the driver, but is required in order to isolate the large capacitance of the bipolar transistor from the bit line. A logical low is impressed upon the bonding pad as a consequence of the bias current flowing through the termination resistor upon actuation of the transistor. When the transistor is turned off the bonding pad rises to the power supply voltage.
Although bipolar line drivers perform satisfactorily in certain applications, it would be advantageous to provide a CMOS implementation so as to enable direct integration of the line driver with other CMOS circuitry. Such integration would obviate the need to simultaneously realize bipolar and CMOS elements upon a single semiconductor chip through bi-CMOS implementations, which tend to be expensive and to consume relatively large areas.
However, in addition to the operating parameter variability described above with respect to CMOS line receivers, still other difficulties hinder potential CMOS implementations of line drivers. Since an MOS transistor behaves similarly to a resistor when turned on, the magnitude of the logical low impressed upon the bonding pad will be a strong function of transistor bias current. In addition, the current drive capability per unit area for MOS transistors is generally less than that of bipolar transistors.
It is thus another object of the present invention to provide a CMOS line driver having a switching threshold substantially invariant to parameter variation, and which is capable of providing a relatively stable logical low output signal.